Talk: Progress in Multiscale Energy-Thermal Management of High Performance Computing Systems
Imagen:
Speaker: Andrea Bartolini, Università di Bologna / ETH Zurich
Room: B-223
Date: Wednesday, April 29, 2015
Time: 12:00
Abstract: While electronics devices are facing critical technological walls (i.e. Power/Thermal/Utilization Walls) that are limiting the performance benefits of the transistor size scaling, the demand for more powerful supercomputers continue to increase. Today’s the powerful Supercomputer is Tianhe-2 which reaches 33.2 PetaFlops with 17.8 MWatts of power dissipation. Exascale supercomputers built upon today’s technology would led to an unsustainable power demand (hundreds of MWatts of power) while an acceptable range for an Exascale supercomputer is 20MWatts; for this goal, current supercomputer systems must obtain significantly higher energy efficiency, with a limit of 50GFlops/W. Today "most green" supercomputer achieves 5.1 GFlops/W, thus remains an order of magnitude gap to fulfill the Exascale requirements. In the latest years we have worked in collaboration with the CINECA Italian supercomputer center to monitor and understand how power-temperature and finally evolves in the supercomputing center with the goal of identifying spots for optimization.
Time: 12:00
Abstract: While electronics devices are facing critical technological walls (i.e. Power/Thermal/Utilization Walls) that are limiting the performance benefits of the transistor size scaling, the demand for more powerful supercomputers continue to increase. Today’s the powerful Supercomputer is Tianhe-2 which reaches 33.2 PetaFlops with 17.8 MWatts of power dissipation. Exascale supercomputers built upon today’s technology would led to an unsustainable power demand (hundreds of MWatts of power) while an acceptable range for an Exascale supercomputer is 20MWatts; for this goal, current supercomputer systems must obtain significantly higher energy efficiency, with a limit of 50GFlops/W. Today "most green" supercomputer achieves 5.1 GFlops/W, thus remains an order of magnitude gap to fulfill the Exascale requirements. In the latest years we have worked in collaboration with the CINECA Italian supercomputer center to monitor and understand how power-temperature and finally evolves in the supercomputing center with the goal of identifying spots for optimization.
After implementing a monitoring framework which uses distributed monitoring infrastructure we have tested the impact of process variability at the different processing elements composing the supercomputer in terms of final energy-to-solution and thermal efficiency. Based on these characterization results we have started working on optimization IPs to improve job scheduling as well as power and thermal management strategies for large scale computing systems. I will show our primarily results on the effectiveness of these strategies.
Bio: Dr. Andrea Bartolini, received a Ph.D. degree in Electrical Engineering from the University of Bologna, Italy, in 2011. He is currently a Postdoc Researcher in the Integrated Systems Laboratory at ETH Zurich. He also holds a Postdoc Position in the Department of Electrical, Electronic and Information Engineering Guglielmo Marconi (DEI) at the University of Bologna. He is the technical responsible for the ERC-Advance MULTITHERMAN project as well as for the EU PHIDIAS project. Dr. Bartolini is also the main technical responsible for the collaboration with CINECA on Energy-Thermal design of HPC systems for which he was awarded with the “HiPEAC 2013 Technology Transfer Awards”. In addition he won the Best Paper Award in DATE 2013 and the Best IP Paper Award in DATE 2014 Conferences. In the recent years, he has served as TPC member of several international conferences such as PATMOS, DATE, DAC, HPCA and was Web Chair of NOCS’14 and is currently member of the ETP4HPC. His research interests spans from IC low-power design and thermal and power management design.
Destacada primera pagina:
No
