Challenges and Opportunities of Cryo-CMOS for Quantum Computing, Alberto Gómez Saiz

Summary

The challenge of scaling up quantum computers to reach the utility-scale has motivated the study of deep cryogenic (below 10K) electronics as a key enabling technology. CMOS technology, the workhorse of modern integrated circuits, also offers excellent performance in this temperature regime. In the first part of this presentation, we discuss the parameter changes in advanced node MOSFETs at deep-cryogenic temperatures and describe the non-ideal behaviours that designers should be aware of. As quantum effects manifest strongly at ~4K, it becomes possible to realize fundamentally novel devices. In the second part of this presentation, we introduce quantum-based devices realized in CMOS technology such as superconducting switches, superconducting inductors and quantum dot varactors. We then present a methodology for modelling these devices and discuss how to leverage them to push the performance of analog circuits. In the third and final part of the presentation, we present a practical example of the requirements of the electronic interface necessary to operate a quantum computer. We discuss in detail the case of a Silicon Spin quantum computer. We present a scalable multi-module architecture, in which all the integrated circuits components have been fabricated in 22-nm FDSOI technology. We report the cryogenic measurement results of several key ICs of the architecture: a 0-2GHz SP8T switch, a 0.7GHz LNA with a 4.2K noise temperature, and a 6-12 GHz Hartley IQ up-modulator. Overall, the presented results highlight the potential of cryo-CMOS as a key enabler to realize large-scale quantum computers.

Speaker

Alberto Gómez Saiz holds an MSc in Integrated Circuit Design from Imperial College London (2013) and an MSc in Quantum Technologies from University College London (2022). Since 2024, he is pursuing an industrial PhD at Imperial College London and Quantum Motion, with a fellowship (industrial fellowship) from the Royal Commission of the Exhibition of 1851. He has over 12 years of industrial experience in the field of radio frequency (RF) integrated circuit design, having participated in the developments of both the first commercial NFC+Bluetooth system-on-chip (SoC) at CSR and the first commercial NB-IoT SoC at Huawei. His research interests focus on the design of cryo-CMOS circuits for quantum processor control and the exploration of quantum-classical hybrid RF integrated circuits.

Organize

UPM-Indra Chip Chair